The present invention relates generally to active resistive circuits, including active resistor circuits and current amplifier or multiplier circuits, and current divider circuits, and more particularly to active resistive circuits that can achieve high resistance using small size MOS transistors and also can achieve a high degree of linearity when a large range of voltages are applied to such active resistive circuits.
Ordinary passive resistors are used for many circuit applications that require very high resistances. However, known passive resistors have the disadvantage that they require undesirably large amounts of integrated circuit chip area. In some applications, known active resistor structures, such as long-channel diode-connected field effect transistors are used as high resistance resistors, but such devices have the disadvantages of undesirably low linearity and undesirably limited ranges of voltage that can be applied across such active resistor structures.
FIG. 1 shows an active current divider circuit 1 which includes a passive resistor Rin and a current divider 2. An input voltage Vin causes an input current Iin to flow into a conductor that is connected to the (−) input of an operational amplifier 3 and to the gate and drain of a P-channel transistor T1. The (+) input of operational amplifier 3 is connected to ground. The output VM of operational amplifier 3 is connected to the source of transistor T1 and to the source of a P-channel transistor T2, the gate and drain of which are connected to an output terminal OUT. An output current Iout flows through the output conductor into the drain of transistor T2. Active current divider circuit 1 is described in detail in the article “Linear Transconductor with Rail-To-Rail Input Swing for Very Large Time Constant Applications” by Gozzini et al., Electronics Letters, Sep. 14, 2006, Vol. 42, No. 19.
FIG. 2 shows a neural amplifier 5 that uses a MOS-bipolar pseudo-resistor element. Neural amplifier 5 includes a transconductance amplifier 6 which has its (−) input coupled to one terminal of an input capacitor C1a, to one terminal of a feedback capacitor C2a, and to the gate and drain of a P-channel transistor Ma. The other terminal of input capacitor C1a is coupled to Vin. The source of transistor Ma is connected to the gate and drain of a P-channel transistor Mb, the source of which is connected to the other terminal of feedback capacitor C2a, the output Vout of amplifier 6, and one terminal of an output capacitor C1c. The (+) input of transconductance amplifier 6 is connected to one terminal of another input capacitor C1b, the other terminal of which is coupled to Vref. The (+) input of transconductance amplifier 6 also is connected to one terminal of a capacitor C2b and to the gate and drain of a P-channel transistor Mc. The source of transistor Mc is connected to the gate and drain of a P-channel transistor Md. The other terminal of output capacitor C1c and the other terminal of capacitor C2b are connected to ground. The source of transistor Md is connected to ground. This circuit is shown in FIG. 1 of the article “A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications” by Harrison et al., IEEE Journal of Solid-State Circuits, Vol. 38, No. 6, June, 2003.
FIG. 3 shows a high resistance active resistor 7 circuit in which an input resistor Rin is coupled between an input voltage Va and the (−) input of an operational amplifier, the (+) input of which is connected to ground. The (−) input of the operational amplifier is connected to the gate and drain of a transistor Tb1, the source of which is connected to the output of the operational amplifier and the source of a transistor Ta1, the gate and drain of which are connected to the gate and drain of which are connected an output of a first current divider circuit formed by Rin, transistors Tb1 and Ta1, and the operational amplifier. The output of the first current divider circuit is connected to the input of a similar second current divider circuit, the output of which is connected to the input of a similar third current divider circuit, and so forth. The last current divider circuit in the sequence conducts its output current Ia to ground. Active resistor circuit 7 is included as a large-resistance active resistor circuit shown in FIG. 3 of “Transimpedance Amplifier for High Sensitivity Current Measurements on Nano Devices” by Ferrari et al., IEEE Journal of Solid-State Circuits, Vol. 44, No. May, 2009.
For present state-of-the-art CMOS processes, well-defined high resistance values can be implemented by means of passive resistors or active circuits, but passive resistors consume large amounts of die area, which increases cost. Furthermore, such high resistance values cannot be controlled as precisely as would be desirable. Most of the known active resistors consume less integrated circuit chip area than conventional passive integrated circuit resistors but have undesirably poor linearity, undesirably low applied operating voltage ranges, and undesirable temperature-dependent and process-dependent characteristics. For example, since the output current Iout in FIG. 1 flows in the direction opposite to that of input current Iin, active resistor circuit 1 has negative resistance.
Furthermore, active resistor circuit 1 is not symmetrically bilateral, meaning that its resistance is much different if the input current direction is reversed, because the operating region of transistors T1, T2 is different for positive and negative values of input voltage Vin. When Vin is positive, the drain-well PN junctions of transistors T1 and T2 are forward biased and conduct the transistor currents. When Vin is negative, transistors T1 and T2 are in their subthreshold operating regions, and their currents are conducted through the source-drain channels of transistors T1 and T2. Similarly, the resistances of the pseudo-resistor elements used in circuit 5 of FIG. 2 show large voltage dependency, i.e., high non-linearity, since there is an exponential relation between the current and voltage of these pseudo-resistor elements, independent of the transistor operating regions. In addition, the resistances of these pseudo-resistors exhibit substantially process-dependent characteristics. The known active resistor circuit 7 shown in FIG. 3, solves the negative resistance problem of the active resistor circuit shown in FIG. 1 if an even number of stages are cascaded. However, similarly to active resistor 1 in FIG. 1, active resistor 7 in FIG. 3 is not symmetrically bilateral.
Although high resistance and suitable linearity may be obtained with off-chip resistors, this usually results in increased cost and system complexity. Also, use of off-chip resistors adds increased parasitic elements that may substantially degrade circuit performance when an off-chip resistor is connected to a high-impedance circuit node, such as a virtual ground level generated by an operational amplifier.
Current divider circuitry similar to that disclosed in the above mentioned references has been used to provide amplification of very small currents, as disclosed in “Low-Noise Single-Chip Potentiostat for Nano-Bio-Electrochemistry over A 1 MHZ Bandwidth” by Carminati et al., 16th IEEE International Conference on Electronics, Circuits, and Systems, 13-16 Dec. 2009. The potentiostat circuits shown in FIG. 1 and FIG. 2 of this reference are bilateral, but they are not “symmetrically bilateral”. (Bilateral operation is obtained with the addition of parallel connection of N-channel MOSFET transistors in parallel with P-channel MOSFET transistors, so that either a P-channel MOSFET or a N-channel MOSFET transistor conducts current, depending on the current direction).
There is an unmet need for an active resistive circuit and method which allow large input signal swings across the active resistor and which also provide substantially improved linearity of the active resistor characteristics and also show less dependency on process and temperature variations compared to prior active resistive circuits.
There also is an unmet need for an active resistive circuit and method which provide an active resistor having symmetrically bilateral transfer characteristics.
There also is an unmet need for a high-resistance active resistive circuit and method which requires less integrated circuit chip area than prior high resistance active resistor circuits.